A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link

A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link

The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power cons...

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Bibliographische Detailangaben
Hauptverfasser: Fukuda, K., Ono, G., Watanabe, K., Muto, T., Yamashita, H., Masuda, N., Nemoto, R., Suzuki, E., Takemoto, T., Yuki, F., Yagyu, M., Toyoda, H., Kono, M., Kambe, A., Umai, S., Saito, T., Nishimura, S.
Format: Tagungsbericht
Sprache:eng ; jpn
Schlagworte:
Clocks
Large scale integration
Optical receivers
Phase locked loops
Power demand
Voltage-controlled oscillators
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Beschreibung
Zusammenfassung:The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).
ISSN:1550-8781
2374-8443
DOI:10.1109/CSICS.2011.6062438