Critical analysis of 14nm device options

Critical analysis of 14nm device options

Modeling challenges and solutions for silicon based high performance device options at the 14nm node are presented. A variety of devices are being considered, using a variety of methods to analyze the devices objectively. Partially depleted silicon on insulator (PDSOI) devices are compared against e...

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Bibliographische Detailangaben
Hauptverfasser: Oldiges, P., Muralidhar, R., Kulkarni, P., Lin, C., Xiu, K., Guo, D., Bajaj, M., Sathaye, N.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
14nm technology
Equations
ETSOI
FinFET
FinFETs
Logic gates
Mathematical model
PDSOI
Performance evaluation
performance modeling
Semiconductor device modeling
Semiconductor process modeling
TCAD
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Beschreibung
Zusammenfassung:Modeling challenges and solutions for silicon based high performance device options at the 14nm node are presented. A variety of devices are being considered, using a variety of methods to analyze the devices objectively. Partially depleted silicon on insulator (PDSOI) devices are compared against extremely thin (ETSOI) and FinFET devices.
ISSN:1946-1569
1946-1577
DOI:10.1109/SISPAD.2011.6035034