CMOS implementation of one layer of neurons for pattern recognition system

This paper provides a CMOS implementation of single layer of neurons. A current mode mixed signal circuit is proposed to normalize the characteristic bits and to multiply the normalized characteristic bits by the weight values. A comparator is used as an activation function. Simulation results show...

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Hauptverfasser: Moshfe, S., Mashoufi, B., Kamali, N.
Format: Tagungsbericht
Sprache:eng
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Beschreibung
Zusammenfassung:This paper provides a CMOS implementation of single layer of neurons. A current mode mixed signal circuit is proposed to normalize the characteristic bits and to multiply the normalized characteristic bits by the weight values. A comparator is used as an activation function. Simulation results show that our proposed circuit is working well with wide range of current values. Finally, layout of this single layer multi neurons circuit is presented.
ISSN:2159-2047
2159-2055
DOI:10.1109/ICEDSA.2011.5959043