Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks

This paper contributes to robust fault-tolerant computing for expected nano-centric processing hardware. We developed (a) techniques for fault tolerant logic network design given a library of AND, OR, NAND, and NOR Hop field gates, and (b) report experimental results on fault tolerant properties of...

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Bibliographische Detailangaben

Hauptverfasser:	Tran, A. H., Yanushkevich, S. N., Lyshevski, S. E., Shmerko, V. P.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Fault tolerance Fault tolerant systems Hopfield network Libraries Logic gates logic network Merging Neurons Noise noise model
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