Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks

Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks

This paper contributes to robust fault-tolerant computing for expected nano-centric processing hardware. We developed (a) techniques for fault tolerant logic network design given a library of AND, OR, NAND, and NOR Hop field gates, and (b) report experimental results on fault tolerant properties of...

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Hauptverfasser: Tran, A. H., Yanushkevich, S. N., Lyshevski, S. E., Shmerko, V. P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Fault tolerance
Fault tolerant systems
Hopfield network
Libraries
Logic gates
logic network
Merging
Neurons
Noise
noise model
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Beschreibung
Zusammenfassung:This paper contributes to robust fault-tolerant computing for expected nano-centric processing hardware. We developed (a) techniques for fault tolerant logic network design given a library of AND, OR, NAND, and NOR Hop field gates, and (b) report experimental results on fault tolerant properties of designed networks. In particular, several hundred iterations are required to achieve correct outputs in a five-input single-output networks in the presence of 40% noise.
ISSN:0195-623X
2378-2226
DOI:10.1109/ISMVL.2011.21