Design Techniques for Fully Integrated Switched-Capacitor DC-DC Converters

This paper describes design techniques to maximize the efficiency and power density of fully integrated switched-capacitor (SC) DC-DC converters. Circuit design methods are proposed to enable simplified gate drivers while supporting multiple topologies (and hence output voltages). These methods are verified by a proof-of-concept converter prototype implemented in 0.374 mm 2 of a 32 nm SOI process. The 32-phase interleaved converter can be configured into three topologies to support output voltages of 0.5 V-1.2 V from a 2 V input supply, and achieves 79.76% efficiency at an output power density of 0.86 W/mm 2 .