A PC based digital pulse processor

This is the second of two papers concerning the architecture, circuitry design and performance of a pulse processing station. This multifunction system, hosted on a personal computer's ISA bus, incorporates a high performance pulse height analyser, a multichannel scaler and a digital pulse proc...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Basilio Simoes, J., Landeck, J., Cardoso, J.M.R., Loureiro, C.F.M., Malaquias, J.L., Correia, C.M.B.A.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This is the second of two papers concerning the architecture, circuitry design and performance of a pulse processing station. This multifunction system, hosted on a personal computer's ISA bus, incorporates a high performance pulse height analyser, a multichannel scaler and a digital pulse processor. This paper focuses on this last operation mode. The digital pulse processor is mainly based on a floating point digital signal processor, TMS320C31, on a 100 MSPS flash ADC, AD9012, and on a trigger and pulse locator mechanism based on a 16-bit counter synchronized with the sample clock. The preamplifier output is directly sampled and digitized and the incoming pulses are processed in real-time with reduced dead time. The implementation of the pulse processor is discussed and some preliminary results obtained with a HPGe detector are presented. The system is fully controlled by a Windows 95/NT user friendly software package built around the client-server model. It enables remote data assessment and system configuration in a network environment.
ISSN:1082-3654
2577-0829
DOI:10.1109/NSSMIC.1996.591071