A 256Gb NAND Flash Memory Stack with 300MB/s HLNAND Interface Chip for Point-to-Point Ring Topology

A 256Gb NAND flash device includes eight stacked 32Gb MLC die and a 16.2mm 2 HLNAND interface chip providing a 300MB/s synchronous DDR point-to-point ring topology system interface. Four internal busses supporting both 40MHz asynchronous NAND or 133MHz toggle mode NAND allow independent, concurrent...

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Hauptverfasser: Gillingham, P, Jin-Ki Kim, Schuetz, R, Hong-Beom Pyeon, HakJune Oh, Macdonald, D, Choi, E, Chinn, D
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:A 256Gb NAND flash device includes eight stacked 32Gb MLC die and a 16.2mm 2 HLNAND interface chip providing a 300MB/s synchronous DDR point-to-point ring topology system interface. Four internal busses supporting both 40MHz asynchronous NAND or 133MHz toggle mode NAND allow independent, concurrent operation of the MLC die. The device features data truncation power savings, programmable page size, and command packet error detection.
ISSN:2159-483X
DOI:10.1109/IMW.2011.5873241