A 400 MHz S/390 microprocessor

A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/s...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Webb, C.F., Anderson, C.J., Sigal, L., Shepard, K.L., Liptay, J.S., Warnock, J.D., Curran, B., Krumm, B.W., Mayo, M.D., Camporese, P.J., Schwarz, E.M., Farrell, M.S., Restle, P.J., Averill, R.M., Siegel, T.J., Huott, W.V., Chan, Y.H., Wile, B., Emma, P.G., Beece, D.K., Ching-Te Chuang, Price, C.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 169
container_issue
container_start_page 168
container_title
container_volume
creator Webb, C.F.
Anderson, C.J.
Sigal, L.
Shepard, K.L.
Liptay, J.S.
Warnock, J.D.
Curran, B.
Krumm, B.W.
Mayo, M.D.
Camporese, P.J.
Schwarz, E.M.
Farrell, M.S.
Restle, P.J.
Averill, R.M.
Siegel, T.J.
Huott, W.V.
Chan, Y.H.
Wile, B.
Emma, P.G.
Beece, D.K.
Ching-Te Chuang
Price, C.
description A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/sup 2/ with about 7.8M transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units, two fixed point units, two floating point units, a buffer control element, and a register unit. It dispatches one instruction per cycle. A PLL provides a processor clock at 2/spl times/ the system bus frequency.
doi_str_mv 10.1109/ISSCC.1997.585319
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_585319</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>585319</ieee_id><sourcerecordid>585319</sourcerecordid><originalsourceid>FETCH-LOGICAL-i87t-d48b8661cde1603ea023207b31c7e3df4f1876b40047d0477adb84fdbebd56ce3</originalsourceid><addsrcrecordid>eNotj81Kw0AUhQetYKx9AF1IXmDSe3Nn7swsS1BbqHSR7kvmJxCxpEzc6NMbqHAO3-58HCGeECpEcOtd2zZNhc6ZSltN6G5EUZNhaRn4VqycsTCHyNRIC1EAOpKsCe7FwzR9AoB2bAvxsikVQPmx_S3bNTkoz0PI4yWPIU3TmB_FXd99TWn1z6U4vr0em63cH953zWYvB2u-ZVTWW2YMMSEDpQ5qqsF4wmASxV71aA37WaRMnGu66K3qo08-ag6JluL5OjuklE6XPJy7_HO6HqM_aJI8zQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A 400 MHz S/390 microprocessor</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Webb, C.F. ; Anderson, C.J. ; Sigal, L. ; Shepard, K.L. ; Liptay, J.S. ; Warnock, J.D. ; Curran, B. ; Krumm, B.W. ; Mayo, M.D. ; Camporese, P.J. ; Schwarz, E.M. ; Farrell, M.S. ; Restle, P.J. ; Averill, R.M. ; Siegel, T.J. ; Huott, W.V. ; Chan, Y.H. ; Wile, B. ; Emma, P.G. ; Beece, D.K. ; Ching-Te Chuang ; Price, C.</creator><creatorcontrib>Webb, C.F. ; Anderson, C.J. ; Sigal, L. ; Shepard, K.L. ; Liptay, J.S. ; Warnock, J.D. ; Curran, B. ; Krumm, B.W. ; Mayo, M.D. ; Camporese, P.J. ; Schwarz, E.M. ; Farrell, M.S. ; Restle, P.J. ; Averill, R.M. ; Siegel, T.J. ; Huott, W.V. ; Chan, Y.H. ; Wile, B. ; Emma, P.G. ; Beece, D.K. ; Ching-Te Chuang ; Price, C.</creatorcontrib><description>A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/sup 2/ with about 7.8M transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units, two fixed point units, two floating point units, a buffer control element, and a register unit. It dispatches one instruction per cycle. A PLL provides a processor clock at 2/spl times/ the system bus frequency.</description><identifier>ISSN: 0193-6530</identifier><identifier>ISBN: 9780780337213</identifier><identifier>ISBN: 0780337212</identifier><identifier>EISSN: 2376-8606</identifier><identifier>DOI: 10.1109/ISSCC.1997.585319</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS technology ; FETs ; Microprocessors ; Power dissipation ; Power measurement ; Power supplies ; Power system interconnection ; Registers ; Semiconductor device measurement ; Transistors</subject><ispartof>1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, 1997, p.168-169</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/585319$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/585319$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Webb, C.F.</creatorcontrib><creatorcontrib>Anderson, C.J.</creatorcontrib><creatorcontrib>Sigal, L.</creatorcontrib><creatorcontrib>Shepard, K.L.</creatorcontrib><creatorcontrib>Liptay, J.S.</creatorcontrib><creatorcontrib>Warnock, J.D.</creatorcontrib><creatorcontrib>Curran, B.</creatorcontrib><creatorcontrib>Krumm, B.W.</creatorcontrib><creatorcontrib>Mayo, M.D.</creatorcontrib><creatorcontrib>Camporese, P.J.</creatorcontrib><creatorcontrib>Schwarz, E.M.</creatorcontrib><creatorcontrib>Farrell, M.S.</creatorcontrib><creatorcontrib>Restle, P.J.</creatorcontrib><creatorcontrib>Averill, R.M.</creatorcontrib><creatorcontrib>Siegel, T.J.</creatorcontrib><creatorcontrib>Huott, W.V.</creatorcontrib><creatorcontrib>Chan, Y.H.</creatorcontrib><creatorcontrib>Wile, B.</creatorcontrib><creatorcontrib>Emma, P.G.</creatorcontrib><creatorcontrib>Beece, D.K.</creatorcontrib><creatorcontrib>Ching-Te Chuang</creatorcontrib><creatorcontrib>Price, C.</creatorcontrib><title>A 400 MHz S/390 microprocessor</title><title>1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers</title><addtitle>ISSCC</addtitle><description>A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/sup 2/ with about 7.8M transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units, two fixed point units, two floating point units, a buffer control element, and a register unit. It dispatches one instruction per cycle. A PLL provides a processor clock at 2/spl times/ the system bus frequency.</description><subject>CMOS technology</subject><subject>FETs</subject><subject>Microprocessors</subject><subject>Power dissipation</subject><subject>Power measurement</subject><subject>Power supplies</subject><subject>Power system interconnection</subject><subject>Registers</subject><subject>Semiconductor device measurement</subject><subject>Transistors</subject><issn>0193-6530</issn><issn>2376-8606</issn><isbn>9780780337213</isbn><isbn>0780337212</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1997</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj81Kw0AUhQetYKx9AF1IXmDSe3Nn7swsS1BbqHSR7kvmJxCxpEzc6NMbqHAO3-58HCGeECpEcOtd2zZNhc6ZSltN6G5EUZNhaRn4VqycsTCHyNRIC1EAOpKsCe7FwzR9AoB2bAvxsikVQPmx_S3bNTkoz0PI4yWPIU3TmB_FXd99TWn1z6U4vr0em63cH953zWYvB2u-ZVTWW2YMMSEDpQ5qqsF4wmASxV71aA37WaRMnGu66K3qo08-ag6JluL5OjuklE6XPJy7_HO6HqM_aJI8zQ</recordid><startdate>1997</startdate><enddate>1997</enddate><creator>Webb, C.F.</creator><creator>Anderson, C.J.</creator><creator>Sigal, L.</creator><creator>Shepard, K.L.</creator><creator>Liptay, J.S.</creator><creator>Warnock, J.D.</creator><creator>Curran, B.</creator><creator>Krumm, B.W.</creator><creator>Mayo, M.D.</creator><creator>Camporese, P.J.</creator><creator>Schwarz, E.M.</creator><creator>Farrell, M.S.</creator><creator>Restle, P.J.</creator><creator>Averill, R.M.</creator><creator>Siegel, T.J.</creator><creator>Huott, W.V.</creator><creator>Chan, Y.H.</creator><creator>Wile, B.</creator><creator>Emma, P.G.</creator><creator>Beece, D.K.</creator><creator>Ching-Te Chuang</creator><creator>Price, C.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1997</creationdate><title>A 400 MHz S/390 microprocessor</title><author>Webb, C.F. ; Anderson, C.J. ; Sigal, L. ; Shepard, K.L. ; Liptay, J.S. ; Warnock, J.D. ; Curran, B. ; Krumm, B.W. ; Mayo, M.D. ; Camporese, P.J. ; Schwarz, E.M. ; Farrell, M.S. ; Restle, P.J. ; Averill, R.M. ; Siegel, T.J. ; Huott, W.V. ; Chan, Y.H. ; Wile, B. ; Emma, P.G. ; Beece, D.K. ; Ching-Te Chuang ; Price, C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i87t-d48b8661cde1603ea023207b31c7e3df4f1876b40047d0477adb84fdbebd56ce3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1997</creationdate><topic>CMOS technology</topic><topic>FETs</topic><topic>Microprocessors</topic><topic>Power dissipation</topic><topic>Power measurement</topic><topic>Power supplies</topic><topic>Power system interconnection</topic><topic>Registers</topic><topic>Semiconductor device measurement</topic><topic>Transistors</topic><toplevel>online_resources</toplevel><creatorcontrib>Webb, C.F.</creatorcontrib><creatorcontrib>Anderson, C.J.</creatorcontrib><creatorcontrib>Sigal, L.</creatorcontrib><creatorcontrib>Shepard, K.L.</creatorcontrib><creatorcontrib>Liptay, J.S.</creatorcontrib><creatorcontrib>Warnock, J.D.</creatorcontrib><creatorcontrib>Curran, B.</creatorcontrib><creatorcontrib>Krumm, B.W.</creatorcontrib><creatorcontrib>Mayo, M.D.</creatorcontrib><creatorcontrib>Camporese, P.J.</creatorcontrib><creatorcontrib>Schwarz, E.M.</creatorcontrib><creatorcontrib>Farrell, M.S.</creatorcontrib><creatorcontrib>Restle, P.J.</creatorcontrib><creatorcontrib>Averill, R.M.</creatorcontrib><creatorcontrib>Siegel, T.J.</creatorcontrib><creatorcontrib>Huott, W.V.</creatorcontrib><creatorcontrib>Chan, Y.H.</creatorcontrib><creatorcontrib>Wile, B.</creatorcontrib><creatorcontrib>Emma, P.G.</creatorcontrib><creatorcontrib>Beece, D.K.</creatorcontrib><creatorcontrib>Ching-Te Chuang</creatorcontrib><creatorcontrib>Price, C.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Webb, C.F.</au><au>Anderson, C.J.</au><au>Sigal, L.</au><au>Shepard, K.L.</au><au>Liptay, J.S.</au><au>Warnock, J.D.</au><au>Curran, B.</au><au>Krumm, B.W.</au><au>Mayo, M.D.</au><au>Camporese, P.J.</au><au>Schwarz, E.M.</au><au>Farrell, M.S.</au><au>Restle, P.J.</au><au>Averill, R.M.</au><au>Siegel, T.J.</au><au>Huott, W.V.</au><au>Chan, Y.H.</au><au>Wile, B.</au><au>Emma, P.G.</au><au>Beece, D.K.</au><au>Ching-Te Chuang</au><au>Price, C.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 400 MHz S/390 microprocessor</atitle><btitle>1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers</btitle><stitle>ISSCC</stitle><date>1997</date><risdate>1997</risdate><spage>168</spage><epage>169</epage><pages>168-169</pages><issn>0193-6530</issn><eissn>2376-8606</eissn><isbn>9780780337213</isbn><isbn>0780337212</isbn><abstract>A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/sup 2/ with about 7.8M transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units, two fixed point units, two floating point units, a buffer control element, and a register unit. It dispatches one instruction per cycle. A PLL provides a processor clock at 2/spl times/ the system bus frequency.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.1997.585319</doi><tpages>2</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0193-6530
ispartof 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, 1997, p.168-169
issn 0193-6530
2376-8606
language eng
recordid cdi_ieee_primary_585319
source IEEE Electronic Library (IEL) Conference Proceedings
subjects CMOS technology
FETs
Microprocessors
Power dissipation
Power measurement
Power supplies
Power system interconnection
Registers
Semiconductor device measurement
Transistors
title A 400 MHz S/390 microprocessor
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T21%3A06%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20400%20MHz%20S/390%20microprocessor&rft.btitle=1997%20IEEE%20International%20Solids-State%20Circuits%20Conference.%20Digest%20of%20Technical%20Papers&rft.au=Webb,%20C.F.&rft.date=1997&rft.spage=168&rft.epage=169&rft.pages=168-169&rft.issn=0193-6530&rft.eissn=2376-8606&rft.isbn=9780780337213&rft.isbn_list=0780337212&rft_id=info:doi/10.1109/ISSCC.1997.585319&rft_dat=%3Cieee_6IE%3E585319%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=585319&rfr_iscdi=true