A communication architecture for asynchronous pulse frequency modulated analog VLSI systems, based on 1-persistent carrier sense/multiple access

A communication architecture for asynchronous pulse frequency modulated analog VLSI systems, based on 1-persistent carrier sense/multiple access

We present a bus-access method for interchip communication in asynchronous pulse frequency encoded analog VLSI systems. The method is based on sensing traffic on the bus, and refraining from transmission if the bus is busy. This is similar to CSMA protocols for computer networks. The method may be i...

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Bibliographische Detailangaben
Hauptverfasser: Abusland, A., Nilsen, F., Lande, T.S., Sorosen, O.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Encoding
Frequency modulation
Hardware
Informatics
Modulation coding
Protocols
Pulse modulation
Telecommunication traffic
Time division multiplexing
Very large scale integration
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Beschreibung
Zusammenfassung:We present a bus-access method for interchip communication in asynchronous pulse frequency encoded analog VLSI systems. The method is based on sensing traffic on the bus, and refraining from transmission if the bus is busy. This is similar to CSMA protocols for computer networks. The method may be implemented using standard digital gates. We discuss the bus traffic and briefly compare our solution to some existing solutions. We present some measured results from a MOSIS 2 /spl mu/m chip.
DOI:10.1109/ICECS.1996.582641