Design of on-chip Transient Voltage Suppressor in a silicon-based transceiver IC to meet IEC system-level ESD specification

The on-chip Transient Voltage Suppressor (TVS) embedded in the silicon based transceiver IC has been proposed in this paper by using 0.8 μm Bipolar-CMOS-DMOS (BCD) process. The structure of the on-chip TVS is a high voltage Dual Silicon-Controlled-Rectifier (DSCR) with ±19V of high holding voltage (...

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Bibliographische Detailangaben

Hauptverfasser:	Jiang, Ryan Hsin-Chin, Tang-Kuei Tseng, Chi-Hao Chen, Che-Hao Chuang
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Discharges Electrostatic discharge ESD Layout RS232 SCR Stress System-on-a-chip Transceivers TVS
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