A fast CRAM SEU error detection scheme for FPGAs

A fast CRAM SEU error detection scheme for FPGAs

This paper proposes a scheme that can detect SEU errors occurring in an FPGA configuration SRAM cell (CRAM) in a time-efficient manner (>;40X faster or

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Bibliographische Detailangaben
Hauptverfasser: Jong Kiun Kiet, Tan Jun Pin, Ang Boon Jin
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CRAM
Error Detection
Field programmable gate arrays
FPGA
LFSR
MISR
SEU
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Beschreibung
Zusammenfassung:This paper proposes a scheme that can detect SEU errors occurring in an FPGA configuration SRAM cell (CRAM) in a time-efficient manner (>;40X faster or
DOI:10.1109/APCCAS.2010.5775097