A 32nm Westmere-EX Xeon® enterprise processor
The next-generation enterprise Xeon ® processor consists of 10 Westmere 32nm cores and a shared inclusive L3 cache (LLC) integrated on a monolith ic die, with link-based l/Os. This paper focuses on the innovations and circuit optimizations over the predecessor targeting idle power reduction, robust...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | The next-generation enterprise Xeon ® processor consists of 10 Westmere 32nm cores and a shared inclusive L3 cache (LLC) integrated on a monolith ic die, with link-based l/Os. This paper focuses on the innovations and circuit optimizations over the predecessor targeting idle power reduction, robust high-speed I/O links, and performance per watt improvements. The processor is implemented in 32nm CMOS using high-κ metal gate transistors and nine cop per interconnect layers. |
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ISSN: | 0193-6530 2376-8606 |
DOI: | 10.1109/ISSCC.2011.5746225 |