Low power, high linearity wideband receiver front-end for LTE application
This paper presents a low power wideband receiver front-end implemented in 0.18 um CMOS technology for LTE application. The front-end includes a low-noise amplifier and a quadrature passive current commutating mixer. The inductive peaking LNA is designed using common gate topology for wideband match...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | This paper presents a low power wideband receiver front-end implemented in 0.18 um CMOS technology for LTE application. The front-end includes a low-noise amplifier and a quadrature passive current commutating mixer. The inductive peaking LNA is designed using common gate topology for wideband matching with low power consumption. A noise cancellation technique is adopted for the LNA to achieve NF lower than 3dB. A variable gain transconductance amplifier is realized to expanse receiver dynamic range. The tranconductance cell with dynamic bias is designed for high linearity mixer performance. The receiver front-end operates from 0.7 to 2.7 GHz covering all frequency band of 3GPP LTE standard. The front-end shows 38 dB voltage conversion gain, 4.5 dB DSB NF, -10 dBm in-band IIP3 and -6 dBm out-of-band IIP3 while consuming 15 mA from a 1.8 V supply. |
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ISSN: | 1738-9445 |