A novel high gain two stage ultra-wide band CMOS LNA in 0.18μm technology

In this paper, a novel high gain two stage Ultra wideband (UWB) Low Noise Amplifier (LNA) typology is proposed. The broadband matching and the flat gain are two important factors for the broadband circuits. Besides those factors, the minimal Noise Figure (NF), good linearity, and the lower power consumption are also desired. The common gate input stage configuration is used in the proposed LNA to achieve the broadband input matching. The flat gain of the LNA are achieved by the shunt inductor insertion between the cascade stages of LNA and series inductor insertion between two stage. A bias resistor of large value is placed between source and the body node to prevent body effect and reduce noise. The LNA is designed in the standard 0.18μm CMOS technology. The input and output reflection coefficient are less than -12.5dB and -8dB, respectively. It achieved maximum power gain 13.1dB, minimum noise figure is 3.35dB and maximum IIP 3 is -7dBm. It consumes 10.7mW from a 1.8-V supply voltage.