Design and Analysis of High Performance Matrix Filling for DNA Sequence Alignment Accelerator Using ASIC Design Flow

This paper presents the design and analysis high performance matrix filling for DNA sequence alignment accelerator using ASIC design flow. The objective of this paper is to design and analysis matrix module of DNA sequence alignment accelerator using clock cycle to get high performance. The scope of this paper is to optimize the DNA sequences alignment on the matrix filling module by implementing a parallel method of the Smith-Waterman algorithm. This method provides magnificent speed up over than traditional sequential implementation methods while it sensitivity detection is still remained. To optimize the performance of the algorithm by exploiting parallelism in the design several techniques have been developed. In the advanced engineering technology, the massive parallelism can be implemented by using the Field Programmable Logic Array (FPGA) and ASIC techniques. The design was developed in Verilog HDL coding, synthesis and implemented by using Synopsys EDA tools. Using the Synopsys EDA tools, the optimum combination of parameters is manipulated in order to produce the optimize IC. The design produces an matrix filling IP that can work at 3.75 ns clock period before it start to show the negative slack . The technique proposed increased the performance of the module significantly by reducing the clock cycle needed by the matrix filling from 16 cycles initially to single clock cycle. It was successfully implemented on ASIC design flow.