Prospect of tunneling green transistor for 0.1V CMOS

Prospect of tunneling green transistor for 0.1V CMOS

Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8" wafers. Large I ON at low V DD are possible according to TCAD simulations but awaits verification. V DD scaling will greatly benefit from...

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Bibliographische Detailangaben
Hauptverfasser: Chenming Hu, Patel, P, Bowonder, A, Kanghoon Jeon, Sung Hwan Kim, Wei Yip Loh, Chang Yong Kang, Jungwoo Oh, Majhi, P, Javey, A, Tsu-Jae King Liu, Jammy, R
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Doping
Logic gates
Semiconductor device measurement
Semiconductor process modeling
Silicon
Transistors
Tunneling
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Beschreibung
Zusammenfassung:Well designed tunneling green transistor may enable future VLSIs operating at 0.1V. Sub-60mV/decade characteristics have been convincingly demonstrated on 8" wafers. Large I ON at low V DD are possible according to TCAD simulations but awaits verification. V DD scaling will greatly benefit from low (effective) band gap energy, which may be provided by type II heterojunctions of Si/Ge or compound semiconductors.
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2010.5703372