A novel 800V multiple RESURF LDMOS utilizing linear p-top rings

A novel 800V multiple RESURF LDMOS utilizing linear p-top rings

In this paper, a novel 800V multiple RESURF lateral double-diffused MOS (LDMOS) transistor in junction-isolated power IC technology is developed and successfully simulated. The proposed multiple RESURF LDMOS is able to achieve a specific on-resistance of lower than 130 mΩcm 2 while maintaining a bre...

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Bibliographische Detailangaben
Hauptverfasser: Wasisto, H S, Gene Sheu, Shao-Ming Yang, Sihombing, R O, Yufeng Guo, Shang-Hui Tu, Chia-Hao Lee, Yu-Lung Chin, Jin-Shyong Jan
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analytical models
Electric breakdown
Layout
Periodic structures
Semiconductor process modeling
Solid modeling
Three dimensional displays
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Beschreibung
Zusammenfassung:In this paper, a novel 800V multiple RESURF lateral double-diffused MOS (LDMOS) transistor in junction-isolated power IC technology is developed and successfully simulated. The proposed multiple RESURF LDMOS is able to achieve a specific on-resistance of lower than 130 mΩcm 2 while maintaining a breakdown voltage of over 800 volts. The key feature of this novel device is round shape p-top rings which are located on the surface of n-drift region. Optimization of p-top mask design is performed in order to achieve the lowest on-resistance possible with the desired breakdown voltage. An investigation of 3D effect in cylindrical layout is also presented to confirm the performance of device.
ISSN:2159-3442
2159-3450
DOI:10.1109/TENCON.2010.5685880