A 14-bit 100 MS/s self-calibrated DAC with a randomized calibration-period

A 14-bit 100 MS/s self-calibrated DAC with a randomized calibration-period

A 14-bit 100MS/s self-calibrated Digital-to-Analog converter (DAC) is presented. Analog background self-calibration technique with a randomized calibration-period is adopted to improve the dynamic performance. The DAC is fabricated in SMIC 0.13-μm CMOS process and occupies a 1.29mm 2 die area. The m...

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Bibliographische Detailangaben
Hauptverfasser: Dong Qiu, Sheng Fang, Renzhong Xie, Ran Li, Ting Yi, Zhiliang Hong
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Arrays
Calibration
Clocks
Current measurement
Generators
Power supplies
Semiconductor device measurement
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Beschreibung
Zusammenfassung:A 14-bit 100MS/s self-calibrated Digital-to-Analog converter (DAC) is presented. Analog background self-calibration technique with a randomized calibration-period is adopted to improve the dynamic performance. The DAC is fabricated in SMIC 0.13-μm CMOS process and occupies a 1.29mm 2 die area. The measured DNL/INL is better than 3.1LSB/4.3LSB. The SFDR is 72.8dB at 1MHz signal and 100MHz sampling frequency. And the current consumption is 50mA under 1.2/3.3V dual power supplies for digital and analog part, respectively.
DOI:10.1109/ICSICT.2010.5667743