A configurable cascaded continuous-time ΔΣ modulator with up to 15MHz bandwidth

A reconfigurable cascaded continuous-time 3-1 ΔΣ modulator with low PVT sensitivity was developed and implemented in 65nm digital CMOS. The 0.17mm 2 chip achieves 67/55dB SNR and 70/61dB DR at 10/15MHz bandwidth with only 208MHz clock frequency and 10.5mW power consumption from a 1.3V supply.

Bibliographische Detailangaben

Hauptverfasser:	Sauerbrey, J, Garcia, J S P, Panov, G, Piorek, T, Xianghua Shen, Schimper, M, Koch, R, Keller, M, Manoli, Y, Ortmanns, M
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bandwidth Modulation Signal to noise ratio Temperature measurement Transfer functions Voltage measurement
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