Static Average Case Power Estimation Technique for Block Ciphers

In this paper a new static average case dynamic power estimation technique is introduced based on the property of randomness preservation for digital circuits. The proposed technique is validated by estimating the average case power for a block cipher, DES with a lower estimation error percentage of 0.9481 % and lesser simulation time with a pattern reduction of (2" × 2"!)-(2" × 2" × 2) for n bit design. The same technique can be extended to any block cipher, including the AES and IDEA-NXT.