Reconfigurable architecture for IP peripherals

A SoC typically integrates multiple peripheral IPs. Each one of these IP's has its own interfaces and integration requirements. The test benches designed for these IP's are different and require independent porting of test-cases on the SoC, thereby extending the test time. Also, practically there may not exist any use case that requires all these IPs at the same time. In this paper we propose a novel reconfigurable architecture concept to integrate multiple IPs on a single recon-figurable IP. This concept is applied to implement multiple serial and audio interface applications on a single IP. We also propose a methodology to integrate similar audio and serial interfaces onto a single reusable architecture. The architecture features multiple configurable blocks which are reconfigured and re-arranged to perform as any one of the serial or audio peripherals. The proposed architecture is AMBA compliant and special attention has been given to ensure an ease of SoC integration.