Integrated circuits for data transmission over twisted-pair channels

This paper discusses typical architectures and challenges in designing integrated circuits for data transmission over twisted-pair wire channels. To highlight the various architectural approaches, two main applications are discussed-high-bit-rate digital subscriber loop (HDSL) and fast-Ethernet. Alt...

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Veröffentlicht in:IEEE journal of solid-state circuits 1997-03, Vol.32 (3), p.398-406
Hauptverfasser: Johns, D.A., Essig, D.
Format: Artikel
Sprache:eng
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Zusammenfassung:This paper discusses typical architectures and challenges in designing integrated circuits for data transmission over twisted-pair wire channels. To highlight the various architectural approaches, two main applications are discussed-high-bit-rate digital subscriber loop (HDSL) and fast-Ethernet. Although these two applications have orders of magnitude difference in their bit rates, they share many common building blocks including line-drivers, 24 wire hybrids, echo cancellation, digital equalization, and clock recovery. Typical integrated circuit approaches for realizing each of these blocks are presented as well as possible tradeoffs. Finally, future challenges facing integrated circuit designers are presented.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.557638