III-V FET channel designs for high current densities and thin inversion layers

III-V FETs are being developed for potential application in 0.3-3 THz systems and VLSI. To increase bandwidth, we must increase the drive current I d = qn s v inj W g per unit gate width W g , requiring both high sheet carrier concentrations n s and high injection velocities v inj . Present III-V NF...

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Hauptverfasser: Rodwell, M, Frensley, W, Steiger, S, Chagarov, E, Lee, S, Ryu, H, Tan, Y, Hegde, G, Wang, L, Law, J, Boykin, T, Klimek, G, Asbeck, P, Kummel, A, Schulman, J N
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:III-V FETs are being developed for potential application in 0.3-3 THz systems and VLSI. To increase bandwidth, we must increase the drive current I d = qn s v inj W g per unit gate width W g , requiring both high sheet carrier concentrations n s and high injection velocities v inj . Present III-V NFETs restrict control region transport to the single isotropic Γ band minimum. As the gate dielectric is thinned, I d becomes limited by the effective mass m*, and is only increased by using materials with increased m* and hence increased transit times. The deep wavefunction also makes Γ-valley transport in low-m* materials unsuitable for
ISSN:1548-3770
2640-6853
DOI:10.1109/DRC.2010.5551882