A fine-resolution Time-to-Digital Converter for a 5GS/S ADC

This paper presents the architecture of a high-speed time-based Analog-to-Digital Converter (ADC) based on voltage-to-time and time-to-digital conversion. A tunable Time-to-Digital Converter (TDC) that is robust against process variation and suitable for embedding within a 3-bit ADC is discussed and...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Townsend, K A, Macpherson, A R, Haslett, J W
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analog-digital conversion Clocks Delay effects Delay lines Radio frequency Robustness Sampling methods Signal resolution Tunable circuits and devices Voltage
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!