Process variation compensation of a 4.6 GHz LNA in 65nm CMOS

We present the design of a 4.6 GHz LNA in TSMC 65nm with a feedback scheme to compensate for variations across process, supply voltage, and temperature. No post fabrication efforts are required in this compensation method. The proposed method improves the variation in S 21 of an inductively degenera...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Mukadam, M Y, Filho, O G, Xuan Zhang, Apsel, A B
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Capacitance CMOS process Fabrication Impedance matching Manufacturing processes Noise figure Radio frequency Temperature Transconductance Voltage
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