Highly manufacturable ELK integration technology with metal hard mask process for high performance 32nm-node interconnect and beyond

High performance 32 nm-node interconnect with ELK (Extremely Low-k, k=3D2.4) has been demonstrated. To suppress process damage and enlarge the via-line space with a wide lithography process margin, robust ELK film with a metal hard mask (MHM) self-aligned via process has been developed. It has accom...

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Hauptverfasser: Matsumoto, S, Harada, T, Morinaga, Y, Inagaki, D, Shibata, J, Tashiro, K, Kabe, T, Iwasaki, A, Hirao, S, Tsutsue, M, Nomura, K, Seo, K, Hinomura, T, Torazawa, N, Suzuki, S, Kobayashi, K, Korogi, H, Okamura, H, Kanda, Y, Shigetoshi, T, Watanabe, M, Tomiyama, K, Shimizu, H, Matsumoto, M, Sasaki, T, Hamatani, T, Hagihara, K, Ueda, T
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:High performance 32 nm-node interconnect with ELK (Extremely Low-k, k=3D2.4) has been demonstrated. To suppress process damage and enlarge the via-line space with a wide lithography process margin, robust ELK film with a metal hard mask (MHM) self-aligned via process has been developed. It has accomplished both ultimate low capacitance wirings and high TDDB reliability between Cu lines with vias. In addition, a novel technique of interface engineering between ELK and a liner layer has been developed to strengthen the tolerance against chip packaging. This has achieved highly reliable chip packaging. This complete process has a high manufacturability and it therefore offers a promising technology for the 32-nm node and beyond.
ISSN:2380-632X
2380-6338
DOI:10.1109/IITC.2010.5510707