Comparison of two architectures for implementation of the discrete cosine transform

Comparison of two architectures for implementation of the discrete cosine transform

A new DCT architecture developed by Mou and Jutand (1991) is compared to an architecture based on distributed arithmetic with ROMs realized as random logic. Both architectures have been implemented in 0.8 /spl mu/m CMOS technology and optimized with different constraints on area and timing. The resu...

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Bibliographische Detailangaben
Hauptverfasser: Sundsbo, I., Lokken Hansen, G., Aas, E.J.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Arithmetic
CMOS technology
Computer architecture
Computer science
Discrete cosine transforms
Encoding
Energy consumption
HDTV
Image coding
Matrix decomposition
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Beschreibung
Zusammenfassung:A new DCT architecture developed by Mou and Jutand (1991) is compared to an architecture based on distributed arithmetic with ROMs realized as random logic. Both architectures have been implemented in 0.8 /spl mu/m CMOS technology and optimized with different constraints on area and timing. The results reveal that for HDTV applications the design with distributed arithmetic is superior, with lower power consumption and less than half the chip area.
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.1996.550575