Decoupling capacitance study and optimization method for high-performance VLSIs

Decoupling capacitance study and optimization method for high-performance VLSIs

Decoupling capacitance is necessary to stabilize the power distribution network due to the reduced supply voltage and increased current transitions. Decoupling capacitance planning should be a part of design tasks to minimize the silicon area while maintaining the stability of the power distribution...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Zhu, Q K, Yong, J, Mozdzen, T
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Capacitance
Capacitors
Decoupling capacitance allocation
Grid computing
Microprocessor
Microprocessors
Optimization methods
Power distribution
Power grid analysis
Power system stability
Power systems
Silicon
SOC
Very large scale integration
VLSI design
Voltage
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Beschreibung
Zusammenfassung:Decoupling capacitance is necessary to stabilize the power distribution network due to the reduced supply voltage and increased current transitions. Decoupling capacitance planning should be a part of design tasks to minimize the silicon area while maintaining the stability of the power distribution network. This paper shows our study in the on-chip and on-package decoupling capacitors in high-performance microprocessors. At the end, we describe a computer algorithm to optimize the decoupling capacitance allocation based on the power grid analysis.
DOI:10.1109/DDECS.2010.5491746