200GHz CMOS prescalers with extended dividing range via time-interleaved dual injection locking

An unique time-interleaved dual injection locking scheme has been devised to enable ultra high-speed and low-power frequency division with extended frequency locking range. To prove the concept, two frequency dividers (or prescalers) have been realized in 65nm digital CMOS: one divides continuously...

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Bibliographische Detailangaben
Hauptverfasser: Gu, Qun Jane, Heng-Yu Jian, Zhiwei Xu, Yi-Cheng Wu, Chang, Mau-Chung Frank, Baeyens, Yves, Young-Kai Chen
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:An unique time-interleaved dual injection locking scheme has been devised to enable ultra high-speed and low-power frequency division with extended frequency locking range. To prove the concept, two frequency dividers (or prescalers) have been realized in 65nm digital CMOS: one divides continuously from 158GHz to 195GHz (or 21% locking range) with input signal
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2010.5477402