An Interconnect-Line-Size Optimization Model Considering Scattering Effect
Based on the impact of the scattering effect on latency and bandwidth, this letter presents the quality-factor model that optimizes latency and bandwidth effectively with consideration of the scattering effect. Then, we get the optimization analytical model with target interconnect linewidth and lin...
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| Veröffentlicht in: | IEEE electron device letters 2010-07, Vol.31 (7), p.641-643 |
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| container_end_page | 643 |
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| container_title | IEEE electron device letters |
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| creator | Zhu, Zhangming Wan, Dajing Yang, Yintang |
| description | Based on the impact of the scattering effect on latency and bandwidth, this letter presents the quality-factor model that optimizes latency and bandwidth effectively with consideration of the scattering effect. Then, we get the optimization analytical model with target interconnect linewidth and line spacing by the curve-fitting method. The proposed model has been verified and compared for nanoscale CMOS technology. The optimization model is simple, and we can apply it to the interconnect system optimal design of nano-CMOS integrated circuits. |
| doi_str_mv | 10.1109/LED.2010.2047238 |
| format | Article |
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The optimization model is simple, and we can apply it to the interconnect system optimal design of nano-CMOS integrated circuits.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2010.2047238</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Analytical models ; Bandwidth ; CMOS ; CMOS technology ; Curve fitting ; Delay ; Integrated circuit interconnections ; Integrated circuit modeling ; interconnect line size ; latency ; Mathematical analysis ; Nanocomposites ; Nanomaterials ; Nanostructure ; Optimization ; Optimization methods ; Scattering ; scattering effect ; Semiconductor device modeling</subject><ispartof>IEEE electron device letters, 2010-07, Vol.31 (7), p.641-643</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The optimization model is simple, and we can apply it to the interconnect system optimal design of nano-CMOS integrated circuits.</description><subject>Analytical models</subject><subject>Bandwidth</subject><subject>CMOS</subject><subject>CMOS technology</subject><subject>Curve fitting</subject><subject>Delay</subject><subject>Integrated circuit interconnections</subject><subject>Integrated circuit modeling</subject><subject>interconnect line size</subject><subject>latency</subject><subject>Mathematical analysis</subject><subject>Nanocomposites</subject><subject>Nanomaterials</subject><subject>Nanostructure</subject><subject>Optimization</subject><subject>Optimization methods</subject><subject>Scattering</subject><subject>scattering effect</subject><subject>Semiconductor device modeling</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1Lw0AQhhdRsFbvgpeAB0-ps9_JsdSqlUgP1XNINhPZku7W3fRgf70pLR48zTvwvMPwEHJLYUIp5I_F_GnCYNgYCM14dkZGVMosBan4ORmBFjTlFNQluYpxDUCF0GJE3qYuWbgeg_HOoenTwjpMV3aPyXLb243dV731Lnn3DXbJzLtoGwzWfSUrU_X9Mc7bdqhek4u26iLenOaYfD7PP2avabF8WcymRWo4432acYqSGimZEKquK11LmjVK6gqVzGjb5CBMjRKAy5ZnRmSSARhT80blvM34mDwc726D_95h7MuNjQa7rnLod7HUkiudK6YH8v4fufa74IbnSgpMMyakOlBwpEzwMQZsy22wmyr8DFB5cFsObsuD2_LkdqjcHSsWEf9wKZSCnPJfKAFzVA</recordid><startdate>201007</startdate><enddate>201007</enddate><creator>Zhu, Zhangming</creator><creator>Wan, Dajing</creator><creator>Yang, Yintang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| source | IEEE Electronic Library (IEL) |
| subjects | Analytical models Bandwidth CMOS CMOS technology Curve fitting Delay Integrated circuit interconnections Integrated circuit modeling interconnect line size latency Mathematical analysis Nanocomposites Nanomaterials Nanostructure Optimization Optimization methods Scattering scattering effect Semiconductor device modeling |
| title | An Interconnect-Line-Size Optimization Model Considering Scattering Effect |
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