Framed Poly Buffer LOCOS Technology for 0.35 μm CMOS

Framed Poly Buffer LOCOS Technology for 0.35 μm CMOS

An advanced isolation method, Framed Poly-Buffer LOCOS (FPBLOCOS), for a 0.35 μm CMOS technology is presented in this paper. The bird's beak length of the FPBLOCOS isolation technique is smaller compared to the Poly Buffer LOCOS isolation scheme. Excellent thin gate oxide quality and low juncti...

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Bibliographische Detailangaben
Hauptverfasser: Meyssen, V. M. H., Montree, A. H.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Amorphous materials
CMOS process
CMOS technology
Etching
Isolation technology
Laboratories
Leakage current
Oxidation
Scanning electron microscopy
Silicon
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Zusammenfassung:An advanced isolation method, Framed Poly-Buffer LOCOS (FPBLOCOS), for a 0.35 μm CMOS technology is presented in this paper. The bird's beak length of the FPBLOCOS isolation technique is smaller compared to the Poly Buffer LOCOS isolation scheme. Excellent thin gate oxide quality and low junction diode leakage are demonstrated. The feasibility of the isolation module was demonstrated in a 0.35 μm CMOS process where excellent device performance was achieved.