A wafer-level heterogeneous technology integration for flexible pseudo-SoC
A flexible pseudo-SoC incorporating electrostatic MEMS grating light valves and 40 V high-speed pulse-width modulator (PWM) driver CMOS chip is developed to demonstrate wafer-level heterogeneous technology integration. The pseudo-SoC forms a global layer (line/space = 1 ¿m/1 ¿m) on the MEMS and CMOS...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | A flexible pseudo-SoC incorporating electrostatic MEMS grating light valves and 40 V high-speed pulse-width modulator (PWM) driver CMOS chip is developed to demonstrate wafer-level heterogeneous technology integration. The pseudo-SoC forms a global layer (line/space = 1 ¿m/1 ¿m) on the MEMS and CMOS chips, which are both embedded in epoxy resin, with a total thickness of 100 ¿m. |
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ISSN: | 0193-6530 2376-8606 |
DOI: | 10.1109/ISSCC.2010.5434011 |