A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization

A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization

A 45 nm CMOS receiver based on an unclocked DFE is presented. A bi-dimensional equalization simultaneously adapts the DFE tap value and feedback delay, optimizing both the vertical and horizontal eye opening at the sampler input. Realized prototypes show error free operation at 12 Gb/s with 39 dB ba...

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Bibliographische Detailangaben
Hauptverfasser: Pozzoni, M., Erba, S., Sanzogni, D., Ganzerli, M., Viola, P., Baldi, D., Repossi, M., Spelgatti, G., Svelto, F.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Backplanes
Clocks
Decision feedback equalizers
Delay
Event detection
Filters
Jitter
Logic
Principal component analysis
Timing
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Beschreibung
Zusammenfassung:A 45 nm CMOS receiver based on an unclocked DFE is presented. A bi-dimensional equalization simultaneously adapts the DFE tap value and feedback delay, optimizing both the vertical and horizontal eye opening at the sampler input. Realized prototypes show error free operation at 12 Gb/s with 39 dB backplane loss. The receiver core occupies 0.1 mm 2 and consumes 130 mW.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5434006