Low-skew clock distribution using zero-phase-clock-buffer DLLs

Low-skew clock distribution using zero-phase-clock-buffer DLLs

A clock distribution scheme based on a zero-phase-clock-buffer (ZPCB) is presented. Each ZPCB generates an equal phase between its input and output by adjusting its resonant frequency to slightly higher than the clock frequency. A testchip fabricated in a 40 nm LP process measures sub-psec skew over...

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Bibliographische Detailangaben
Hauptverfasser: Ting Wu, Aryanfar, F., Hae-Chang Lee, Jie Shen, Chin, T.J., Werner, C., Chang, K.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit testing
Clocks
Digital control
Inductors
Inverters
Q factor
Resonance
Resonant frequency
Semiconductor device measurement
Wire
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Beschreibung
Zusammenfassung:A clock distribution scheme based on a zero-phase-clock-buffer (ZPCB) is presented. Each ZPCB generates an equal phase between its input and output by adjusting its resonant frequency to slightly higher than the clock frequency. A testchip fabricated in a 40 nm LP process measures sub-psec skew over 500 MHz and 800 MHz ranges, for a 5 GHz single-ended and a 15 GHz differential ZPCB, respectively.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5434002