A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation

A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation

A 3.4 Mb SRAM macro is developed with a built-in stability sensor for adaptive wordline under-drive (AWLUD) in 32 nm HK-MG CMOS technology. By tracking temperature, voltage and process variation of each die, the AWLUD is shown to lower VCCmin by 130 mV, increase yield by 9% at a target frequency, an...

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Bibliographische Detailangaben
Hauptverfasser: Hyunwoo Nho, Kolar, P., Hamzaoglu, F., Yih Wang, Karl, E., Yong-Gee Ng, Bhattacharya, U., Zhang, K.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuits
CMOS technology
Degradation
Frequency
Random access memory
Sensor arrays
Stability
Temperature sensors
Testing
Voltage
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Beschreibung
Zusammenfassung:A 3.4 Mb SRAM macro is developed with a built-in stability sensor for adaptive wordline under-drive (AWLUD) in 32 nm HK-MG CMOS technology. By tracking temperature, voltage and process variation of each die, the AWLUD is shown to lower VCCmin by 130 mV, increase yield by 9% at a target frequency, and is projected to reduce test time up to 40% by eliminating die-by-die WLUD programming.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5433816