16nm functional 0.039µm2 6T-SRAM cell with nano injection lithography, nanowire channel, and full TiN gate

Record area size of 0.039 μm 2 for a functional 6T-SRAM cell has been successfully achieved with a novel Nano Injection Lithography (NIL) technique and dynamic V dd regulator (DVR). The NIL technique is not only maskless for minimizing entry cost but also photoresist free to greatly enhance pattern resolution, down to 2 nm 3-sigma line width roughness, and without significant proximity effect. Devices with nanowire channels and full TiN single gate for both N- and P-MOS are demonstrated with short channel and simplified integration process. This work discloses a new way to explore 16 nm CMOS device and circuit design, and obtains early access to extreme CMOS scaling.