A low-power pairing-based cryptographic accelerator for embedded security applications

We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2 251 ). In this paper, we describe the implementation of the design in TSMC 65 nm GP CMOS standard cells and the optimi...

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Bibliographische Detailangaben
Hauptverfasser:	English, T., Keller, M., Ka Lok Man, Popovici, E., Schellekens, M., Marnane, W.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Application specific integrated circuits Elliptic curve cryptography Elliptic curves Hardware Identity-based encryption Microelectronics Natural languages Public key cryptography Runtime Security
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Beschreibung
Zusammenfassung:	We report on the implementation of an IP core for Pairing-based cryptography. The core performs an elliptic curve cryptographic operation called the Tate Pairing over the field GF(2 251 ). In this paper, we describe the implementation of the design in TSMC 65 nm GP CMOS standard cells and the optimisations made for low-power operation. The resulting core computes the pairing in 1.5 ms and consumes less than 4 mW.
ISSN:	2164-1676 2164-1706
DOI:	10.1109/SOCCON.2009.5398017