Digital static calibration technology used for 400MSPS, 16-bit DAC

Digital static calibration technology used for 400MSPS, 16-bit DAC

In this study, the digital static calibration technique used for 400MSPS, 16-bit high-resolution current steering DAC is described. The technique uses address generator, comparator, SAR register, and calibration DAC to comprise successive approximation calibration loop. With the calibration loop, th...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Zhu Dongmei, Fu Dongbing, Shi Jiangang, Li Kaicheng
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analog integrated circuits
Calibration
current steering DAC
DC resolution
digital static calibration
DNL
Equations
Frequency domain analysis
Fuses
Manufacturing processes
mismatch
MOSFETs
SAR
Signal resolution
Solid state circuits
Testing
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Beschreibung
Zusammenfassung:In this study, the digital static calibration technique used for 400MSPS, 16-bit high-resolution current steering DAC is described. The technique uses address generator, comparator, SAR register, and calibration DAC to comprise successive approximation calibration loop. With the calibration loop, the respective calibration of array units of current source can be implemented automatically one by one, thus improving greatly matchable performance of current source. The differential nonlinearity error of 16-bit current steering DAC with the calibration technology reaches a true 16-bit relative static resolution with DNL
DOI:10.1109/EDSSC.2009.5394183