A new electrothermally-aware methodology for full-chip temperature optimization
Due to the fact that there is electrothermal coupling between power, delay, and temperature, the paper presents a new electrothermally-aware methodology for full-chip temperature optimization. The main idea is that characteristics of temperature distribution can be improved dramatically by a certain...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | Due to the fact that there is electrothermal coupling between power, delay, and temperature, the paper presents a new electrothermally-aware methodology for full-chip temperature optimization. The main idea is that characteristics of temperature distribution can be improved dramatically by a certain given delay penalty. As an example, based on HotSpot, the optimization for AMD Athlon 64 processor in 90-nm technology is given in the paper. Simulation results show that the chip temperature and power optimized by the proposed method are decreased, temperature gradient is also reduced. |
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ISSN: | 2162-7541 2162-755X |
DOI: | 10.1109/ASICON.2009.5351222 |