A deep trench isolation integrated in a 0.13um BiCD process technology for analog power ICs

This paper presents a 0.13 um BiCD process (BiCD-0.13) based on a 0.13 um standard CMOS technology with a superior Deep Trench Isolation(DTI). Merits of using DTI are to improve breakdown voltage, reduce parasitic transistor actions and increase area density, compared with Junction-Isolation. We simulated the stress and the device characteristics, and optimized the parameters of DTI design and process steps. It has been successfully developed the process integration of DTI into 0.13 um process technology with various kinds of HV devices including ultra-low on resistance LDMOS.