Breakdown voltage improvement of standard MOS technologies targeted at smart power

This paper presents and discusses trade-offs of three different design techniques intended to improve the breakdown voltage of n-type lateral medium power transistors to be fabricated in a conventional low cost CMOS technology. A thorough analysis of the static and dynamic characteristics of the mod...

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Hauptverfasser:	Mendonca Santos, P., Castro Simas, M.I., Lanca, M., Finco, S., Behrens, F.H.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	BALLASTS Circuit topology CMOS technology CONTROL Costs Electronic ballasts ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATION ENERGY EFFICIENCY Frequency Integrated circuit technology LIGHTING SYSTEMS POWER CONDITIONING CIRCUITS Power integrated circuits POWER SUPPLIES Power transistors Protection Voltage-controlled oscillators
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