47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking

47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking

An inductive-coupling programmable bus is developed for NAND flash memory access in Solid State Drive (SSD). A channel arrangement scheme using 3 coils enables random access for memory read and memory write. Transmission power is reduced by 47% compared to a previous design with 2 coils and a shield...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Saito, M., Sugimori, Y., Kohama, Y., Yoshida, Y., Miura, N., Ishikuro, H., Kuroda, T.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Coils
Data communication
Logic
Read-write memory
Relays
Solid state circuits
Stacking
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An inductive-coupling programmable bus is developed for NAND flash memory access in Solid State Drive (SSD). A channel arrangement scheme using 3 coils enables random access for memory read and memory write. Transmission power is reduced by 47% compared to a previous design with 2 coils and a shield. A coil layout style, namely XY coil, allows the coils covered by logic interconnections, resulting in area reduction by 91%. Relayed data transmission at 1.6 Gb/s and BER
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2009.5280819