A uniform design methodology for application specific digital integrated circuits in automotive applications

Summary form only given. We present a design methodology for application specific digital integrated circuits in automotive applications. The design methodology is based on the use of: (i) automatic generation and characterization of standard cell libraries, (ii) VHDL based top down design flow starting from behavioral level down to gate level, (iii) RTL synthesis and automatic layout generation in an iterative optimization procedure to achieve minimal area results, and (iv) link to the analog circuit design in a mixed signal environment, enabling cosimulation of analog and backannotated digital parts.