A fully planarized 0.25 /spl mu/m CMOS technology for 256 Mbit DRAM and beyond

Results are presented for a fully planarized 0.25 /spl mu/m technology using a trench storage capacitor known as the "BEST" cell. In order to achieve a wide process window for fine patterning, a comprehensive global planarization scheme utilizing chemical mechanical polishing (CMP) is empl...

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Bibliographische Detailangaben

Hauptverfasser:	Bronner, G., Aochi, H., Gall, M., Gambino, J., Gernhardt, S., Hammerl, E., Ho, H., Iba, J., Ishiuchi, H., Jaso, M., Kleinhenz, R., Mii, T., Narita, M., Nesbit, L., Neumueller, W., Nitayama, A., Ohiwa, T., Parke, S., Ryan, J., Sato, T., Takato, H., Yoshikawa, S.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Aluminum Capacitors Chemical technology CMOS technology Electrodes Focusing Lithography Planarization Random access memory Wiring
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