A compact 0.8-6GHz fractional-N PLL with binary-weighted D/A differentiator and offset-frequency Δ−Σ modulator for noise and spurs cancellation

A compact 0.8-6GHz fractional-N PLL with binary-weighted D/A differentiator and offset-frequency Δ−Σ modulator for noise and spurs cancellation

A compact, low power and global-mismatch-tolerant 0.8-6GHz fractional-N PLL covers IEEE 802.11abg, PCS/DCS and cellular bands by using a binary-weighted 2 nd order digital/analog differentiator (DAD) to achieve 2 nd order mismatch shaping and reduce the quantization noise by 25dB, and using a 3 rd o...

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Bibliographische Detailangaben
Hauptverfasser: Jian, Heng-Yu, Xu, Zhiwei, Wu, Yi-Cheng, Chang, Frank
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Noise cancellation
Phase locked loops
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Beschreibung
Zusammenfassung:A compact, low power and global-mismatch-tolerant 0.8-6GHz fractional-N PLL covers IEEE 802.11abg, PCS/DCS and cellular bands by using a binary-weighted 2 nd order digital/analog differentiator (DAD) to achieve 2 nd order mismatch shaping and reduce the quantization noise by 25dB, and using a 3 rd order offset-frequency Δ-Σ modulator to reduce in-band spurs by 20dB in simulation and 8dB in current single-ended practice.
ISSN:2158-5601
2158-5636