A 36.1 GHz Single Stage Low Noise Amplifier Using 0.13 µm CMOS Process

In this paper, a 36.1 GHz single stage LNA using a simple passive output matching technique is demonstrated. The circuit is simulated in Cadence Spectra with 0.13 mum CMOS process parameters. The simulated results exhibit a forward gain of 11.4 dB at 36.1 GHz and 4.9 GHz bandwidth. Reverse isolation is less than -24.6 dB and the input-output matchings are -30.4 dB and -27.65 dB respectively. The circuit achieves a NF of 2.9 dB at the center frequency and consumes only 3.38 mW of power when driven from 1.2 V power supply. To the best of the authorspsila knowledge, a single stage LNA operating at such high frequency is yet to be reported.