A 60-GHz CMOS receiver with an on-chip ADC

A 60-GHz CMOS receiver with an on-chip ADC

A broadband 60-GHz receiver implemented in a 65-nm baseline CMOS technology is presented. A millimeter-wave front-end, including a single-ended low noise amplifier and a balanced resistive mixer, an IF-stage and an analog baseband circuit with an analog-to-digital converter are integrated on a singl...

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Bibliographische Detailangaben
Hauptverfasser: Varonen, M., Kaltiokallio, M., Saari, V., Viitala, O., Karkkainen, M., Lindfors, S., Ryynanen, J., Halonen, K.A.I.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
ADC
Baseband
Broadband amplifiers
CMOS
CMOS technology
Integrated circuit measurements
Integrated circuit technology
Low-noise amplifiers
Millimeter wave integrated circuits
Millimeter wave measurements
Millimeter wave technology
MMIC receivers
Semiconductor device measurement
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Beschreibung
Zusammenfassung:A broadband 60-GHz receiver implemented in a 65-nm baseline CMOS technology is presented. A millimeter-wave front-end, including a single-ended low noise amplifier and a balanced resistive mixer, an IF-stage and an analog baseband circuit with an analog-to-digital converter are integrated on a single chip. The receiver achieves a measured 7.0-dB noise figure at 60 GHz and the voltage gain can be controlled between 45 to 79 dB. The measured 1-dB input compression point is -38.5 dBm.
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2009.5135577