An Integrated 18 GHz fractional-N PLL in SiGe BiCMOS technology for satellite communications

We present a single-chip fractional-N PLL for space applications. The design employs a high-current charge pump with optimum output biasing and a low-current charge pump for extension of the tuning range. We show that the extension of the tuning range does not increase phase noise and reference spur...

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Hauptverfasser: Herzel, F., Osmany, S.A., Schmalz, K., Winkler, W., Scheytt, J.C., Podrebersek, T., Follmann, R., Heyer, H.-V.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:We present a single-chip fractional-N PLL for space applications. The design employs a high-current charge pump with optimum output biasing and a low-current charge pump for extension of the tuning range. We show that the extension of the tuning range does not increase phase noise and reference spurs. The PLL is tunable from 17.5 GHz to 18.9 GHz, and the phase noise at 1 MHz offset is below -110 dBc/Hz. Since loop bandwidth and phase noise are almost independent of the output frequency, the design is robust against parameter variations with process, voltage, temperature, and ageing.
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2009.5135551