On-chip principal component analysis with a mean pre-estimation method for spike sorting
Principal component analysis (PCA) spike sorting hardware in an integrated neural recording system is highly desired for wireless neuroprosthetic devices. However, a large memory is required to store thousands of spike events during the PCA training procedure, which impedes the on-chip implementatio...
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creator | Tung-Chien Chen Kuanfu Chen Wentai Liu Liang-Gee Chen |
description | Principal component analysis (PCA) spike sorting hardware in an integrated neural recording system is highly desired for wireless neuroprosthetic devices. However, a large memory is required to store thousands of spike events during the PCA training procedure, which impedes the on-chip implementation for the PCA training engine. In this paper, a mean pre-estimation method is proposed to save 99.01% memory requirement by breaking the algorithm dependency. According to the simulation result, 100 dB signal-to-error power ratio can be preserved for the resulting principal components. According to the implementation result, 6.07 mm 2 silicon area is required after a 283.16 mm 2 area saving for the proposed PCA training hardware. |
doi_str_mv | 10.1109/ISCAS.2009.5118461 |
format | Conference Proceeding |
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However, a large memory is required to store thousands of spike events during the PCA training procedure, which impedes the on-chip implementation for the PCA training engine. In this paper, a mean pre-estimation method is proposed to save 99.01% memory requirement by breaking the algorithm dependency. According to the simulation result, 100 dB signal-to-error power ratio can be preserved for the resulting principal components. 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However, a large memory is required to store thousands of spike events during the PCA training procedure, which impedes the on-chip implementation for the PCA training engine. In this paper, a mean pre-estimation method is proposed to save 99.01% memory requirement by breaking the algorithm dependency. According to the simulation result, 100 dB signal-to-error power ratio can be preserved for the resulting principal components. According to the implementation result, 6.07 mm 2 silicon area is required after a 283.16 mm 2 area saving for the proposed PCA training hardware.</description><subject>Biomedical signal processing</subject><subject>Coprocessors</subject><subject>Covariance matrix</subject><subject>Engines</subject><subject>Event detection</subject><subject>Feature extraction</subject><subject>Hardware</subject><subject>Principal component analysis</subject><subject>Signal processing algorithms</subject><subject>Sorting</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>1424438276</isbn><isbn>9781424438273</isbn><isbn>1424438284</isbn><isbn>9781424438280</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkMlqwzAYhNUlUCftC7QXvYDcX5stH0PoEgjkkBZ6C7KWRm0sG0tQ8vY1NNDTwMzwwQxC9xRKSqF5XO9Wy13JAJpSUqpERS_QnAomBFdMiUtUMCoVoZLJq_-grq5RAaymRHBgM1QoIJWoJIcbNE_pC2AiVqxAH9tIzCEMeBhDNGHQR2z6buijixnrqI-nFBL-CfmANe6cjlPREZdy6HQOfZy8fOgt9v2I0xC-HU79mEP8vEUzr4_J3Z11gd6fn95Wr2SzfVmvlhsSaC0zaaC1DdfMtd4qDo0XreVSSuME86BbW2sjeUNNzYAxLp3yxrcAluqKC2v5Aj38cYNzbj-t6PR42p-v4r-GkFi_</recordid><startdate>200905</startdate><enddate>200905</enddate><creator>Tung-Chien Chen</creator><creator>Kuanfu Chen</creator><creator>Wentai Liu</creator><creator>Liang-Gee Chen</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200905</creationdate><title>On-chip principal component analysis with a mean pre-estimation method for spike sorting</title><author>Tung-Chien Chen ; Kuanfu Chen ; Wentai Liu ; Liang-Gee Chen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-90bd93a2ebfd8309f4bd3555ce42f0abd7ac5391c7202235e8fcfb00d1a634dd3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Biomedical signal processing</topic><topic>Coprocessors</topic><topic>Covariance matrix</topic><topic>Engines</topic><topic>Event detection</topic><topic>Feature extraction</topic><topic>Hardware</topic><topic>Principal component analysis</topic><topic>Signal processing algorithms</topic><topic>Sorting</topic><toplevel>online_resources</toplevel><creatorcontrib>Tung-Chien Chen</creatorcontrib><creatorcontrib>Kuanfu Chen</creatorcontrib><creatorcontrib>Wentai Liu</creatorcontrib><creatorcontrib>Liang-Gee Chen</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tung-Chien Chen</au><au>Kuanfu Chen</au><au>Wentai Liu</au><au>Liang-Gee Chen</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>On-chip principal component analysis with a mean pre-estimation method for spike sorting</atitle><btitle>2009 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2009-05</date><risdate>2009</risdate><spage>3110</spage><epage>3113</epage><pages>3110-3113</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>1424438276</isbn><isbn>9781424438273</isbn><eisbn>1424438284</eisbn><eisbn>9781424438280</eisbn><abstract>Principal component analysis (PCA) spike sorting hardware in an integrated neural recording system is highly desired for wireless neuroprosthetic devices. However, a large memory is required to store thousands of spike events during the PCA training procedure, which impedes the on-chip implementation for the PCA training engine. In this paper, a mean pre-estimation method is proposed to save 99.01% memory requirement by breaking the algorithm dependency. According to the simulation result, 100 dB signal-to-error power ratio can be preserved for the resulting principal components. According to the implementation result, 6.07 mm 2 silicon area is required after a 283.16 mm 2 area saving for the proposed PCA training hardware.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2009.5118461</doi><tpages>4</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Biomedical signal processing Coprocessors Covariance matrix Engines Event detection Feature extraction Hardware Principal component analysis Signal processing algorithms Sorting |
title | On-chip principal component analysis with a mean pre-estimation method for spike sorting |
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